001
000001405
003
LDTU
020
$a9780137215492
041
$aeng
082
$a621.395
100
$aJenkins, Jesse $etác giả
245
$aDesigning with Fpgas and Cplds $cJesse Jenkins
260
$aUnited States of America $bPrentice Hall $c1994
300
$a273 p. $c21 cm
520
$aChapter 1: Anatomy of a field programmable gate array; Chapter 2: Design software; Chapter 3: Programmable macro logic; Chapter 4: Logic cell array; Chapter 5: Multiple array matrix; Chapter 6: ACT; Chapter 7: A large example; Chapter 8: Additional FPGAs and CPLDs; Chapter 9: Newcomers; Chapter 10: Benchmarks and metrics; Chapter 11: Decisions; Chapter 12: Retargetting.
650
$aField programmable gate arrays
653
$aField programmable gate arrays
852
$a7/25 Quang Trung $bNgoại văn
911
Trần Thị Hậu
927
Mua
928
34675
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